ACM Research Receives Multiple Advanced Packaging Equipment Orders from Leading Global Customers

Expands Advanced Packaging Platform Across Wafer-Level and Panel-Level Applications in Key Global Markets-FREMONT, Calif., Feb. 26, 2026 ...
Semiconductor Engineering

One Micron Damascene Redistribution for Fan-Out Wafer Level Packaging Using a Photosensitive Dielectric Material

This study investigates creation of 1.0µm RDL structures by a damascene process utilizing a photosensitive permanent dielectric material. The advantage of the photosensitive dielectric approach is ...
EDN

Will fan-out wafer-level packaging keep Moore’s Law valid?

Moore’s Law in process technology is on its last legs, so advanced packaging is taking up the baton. Advanced techniques such as fan-out wafer-level packaging (FOWLP) allow increased component density ...
Digi Times

Samsung steps up fan-out wafer-level packaging deployment

Samsung Electronics has stepped up its deployment in the fan-out (FO) wafer-level packaging segment with plans to set up related production lines in Japan, according to industry sources. Samsung has ...
Digi Times

South Korea initiates major R&D project to boost chips packaging competitiveness

Recognizing the strategic importance of semiconductor packaging technology, the South Korean government is reportedly initiating a major packaging technology R&D project aimed at assisting companies ...
AZOM

Maximize Performance and Optimizes Costs with Plasma Treatment

Nordson MARCH Addresses the Ways Plasma Treatment during Fan-out Wafer and Fan-out Panel-Level Semiconductor Packaging Maximizes Performance and Optimizes Costs In recent years, there has been an ...
Electronic Design

Chip Packaging Part 6 - Wafer to Panel Level Packaging

Dr. Navid Asadi’s group takes a look at wafer to panel level chip packaging. This is the six of a mutlipart series on chip packaging technologies. Navid Asadi is an assistant professor in the ...
Electronic Design

Inspection systems address ‘middle-end’ semiconductor processes

Packaging advances are driving innovation at KLA-Tencor, which in May announced two new systems that support advanced semiconductor packaging technologies: CIRCL-AP and ICOS T830. Designed for ...
Semiconductor Engineering

Next Steps For Panel-Level Packaging

Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel ...
Opinion
The Fast ModeOpinion

Building the Next Era of Compute Through Advanced Packaging

Continued innovation in advanced packaging opens a clearer path to the outcomes the industry prioritizes. By tightening the physical distance between compute, memory, and interconnect, chipmakers ...
Business Wire

Teledyne Announces Production Readiness of Wafer Level Packaged Uncooled Infrared Detectors

THOUSAND OAKS, Calif.--(BUSINESS WIRE)--Teledyne Technologies Incorporated (NYSE:TDY) announced today that its subsidiary, Teledyne DALSA, Inc., a global leader in imaging and vision solutions, ...